International Conference on Physical Assurance and Inspection of Electronics (PAINE) offers an exciting venue to researchers and practitioners in the field of Hardware Security and Trust who research and develop physical assurance and analysis. PAINE brings together experts from government, instrumentation, original component manufacturers (OCMs), original equipment manufacturers (OEMs), and academic researchers together to share ideas and solutions to make electronics devices and systems safe and secure.
Contact Information
Navid Asadi (Co-General Chair) I University of Florida
Paul Hale (Co-General Chair) I NIST
William Zortman (Co-Program Chair) I Sandia National Laboratory
Jose Schutt-Aine (Co-Program Chair) I University of Illinois Urbana Champaign
DEADLINES
| Full Paper Submission (4-7 Pages): | July 18 |
|---|---|
| Notification of Acceptance: | August 15 |
| Camera Ready Version: | September 5 |
Topics covered are including but not limited to:
- New metrologies for characterization and assurance
- Advanced packaging and heterogenous integration
- Emerging topics in physical inspection and assurance
- Image analysis and artificial intelligence for assurance and inspection
- Metrologies characterization
- Automated inspection and metrology for advanced packaging
- Security primitives: Novel devices, materials, and systems
- Test vehicles and performance quantification
- Additive manufacturing assurance for electronics
- Physical and design interface assurance
- Trojans and backdoors: Detection and prevention
- Workforce Development
- Fault injection assessment and countermeasures
- Side channel assessment (power, timing, EM) for assurance and countermeasures
- Analog & mixed-signal circuits and systems security
- FPGA Bitstream protection and vulnerabilities
- Counterfeit Detection and Anti-Counterfeit Technique
- Novel material and devices for assurance
- Sample Preparation
- PCB trust and assurance
- Chip and PCB level decomposition for assurance
- FIB/SEM for assurance
- Electro-optical probing using PEM, EOP, EOFM, etc.
- Physical/side channel fingerprinting
- Mod-chip on PCB
- Microprobing and nanoprobing
- Bus-snooping
- Field-based weakness
- Countermeasures against tampering and decomposition
- Functionality validation
- Process improvements
- Failure analysis and fault isolation
- Physical/logical shielding etc.
- Photonics Assurance
Submission and Review Process
Please prepare your paper in Standard IEEE 2-column PDF format.
You can submit your paper by using Easy Chair Smart CFP portal.
IEEE PAINE publications will use a Single-blind review format.
Accepted papers will be submitted for inclusion into IEEE Xplore subject to meeting IEEE Xplore’s scope and quality requirements.
Accepted papers and posters are required to be presented at the conference for the papers to be published at the IEEE Xplore.
Each presenter (paper/poster) cannot present more than two papers/posters.