Program | Speakers | Sponsorship | Winners | gallery
Past Program Schedule
*All Times are in CST
Time
Day 1: October 24, 2023
7:00 – 8:00
Registration and Breakfast
8:00 – 8:20
Opening remarks – PAINE Awards
General Chair and Program Chair
Plenary Session I
Chair: Dr. Nick Hooten – Invariant Corporation
8:20 – 9:00
Keynote Talk I : CHIPS R&D Metrology Program
Dr. Marla Dowell – National Institute of Standards and Technology
9:00 – 9:40
Visionary Talk: Cut the Clutter Connecting to Leadership
Chris Peters – U.S. Partnership for Assured Electronics.
9:40 – 10:00
Break
SESSION I: Invited Talk
Chair: Dr. Adam Kimura – Battelle
10:00 – 10:20
RESHAPE: Reshore Ecosystem for secure Heterogenous Advanced Packaged Electronics
Alexander Quadrini – Army
10:20 – 10:40
Sustainable Electronics & HW Security/Assurance in the era of European CHIPS Act and the UK National semiconductor state
Dr. Franck Courbon – Ethicronics Ltd
10:40 – 11:00
Nanoscale X-ray Tomography of Integrated Circuits using a Hybrid Electron/X-ray Microscope
Dr. Nathan Nakamura – National Institute of Standards and Technology
11:00 – 11:20
A proficiency scheme for counterfeit part testingeffectiveness
Dan DiMase – Aerocyonics, Inc.
11:20 – 11:40
Break
SESSION II: Paper Presentations
Chair: Dr. Nelson Hastings – NIST
11:40 – 12:00
Simulation-Based Approach to Generating Golden Data for PCB-Level Hardware Trojan Detection using Capacitive Sensor
Shugo Kaji – Nara Institute of Science and Technology
12:00 – 12:20
Rectification for Computed Tomography Scans of Printed Circuit Boards Using Vias as Landmarks
Dr. Alexander Fafard – Two Six Technologies
12:20 – 13:30
Lunch and Exhibit
Plenary Session II
Chair: Dr. Bahar Basim – Intel Corporation
13:30 – 14:10
Keynote Talk II: Trusted and Assured Microelectronics of Printed Circuit Boards Using Vias as Landmarks
Dr. Matthew J. Kay – Office of The Undersecretary of Defense (Research and Engineering)
SESSION III: PANEL DISCUSSION
Moderator: Saverio Fazzari – Booz Allen Hamilton
14:10 – 15:40
Impact of Standards on Additive Manufacturing
Speakers: Brandon Hamilton – BAE Systems, Sarah Adams – Johns Hopkins University Applied Physics Lab (JHU-APL), Dr. Alkim Akyurtlu – Printed Electronics Research Collaborative (PERC) at UMass Lowell.
15:40 – 16:00
Break
SESSION IV-A: Workshop I
Location: Mediterenian I
16:00 – 17:20
Army Outreach Session
Dr. Erin Gawron-Hyla– Army Research Laboratory, Dustin Mathias – Army Research Laboratory
SESSION IV-B: Paper Presentations
Chair: Dr. Santanu Bag – Huntington Ingalls Industries
16:00 – 16:20
Investigating the Effect of Electromagnetic Fault Injections on the Configuration Memory ofSRAM-based FPGA Devices
Alexandre Proulx– Thales Research and Technology Canada
16:20 – 16:40
X-Ray Fault Injection in non-volatile memories
Paul Grandamme– Laboratoire Hubert Curien, Universite Jean Monnet de Saint-Etienne
16:40 – 17:00
Robust Measurements for RF Fingerprinting with Constellation Patterns of Radiated Waveforms
Ameya Ramadurgakar– National Institute of Standards and Technology
17:00 – 17:20
A Modular Blockchain Framework for Enabling Supply Chain Provenance
Ujjwal Guin-Auburn University
17:20 – 19:00
Reception for Posters and Exhibits
Time
Day 2: October 25, 2023
7:20 – 8:20
Registration and Breakfast
Plenary Session III
Chair: Nathan Edwards – USPAE
8:20 – 9:00
Keynote Talk III: Microelectronics Commons
Dr. Alison Smith – Office of The Undersecretary of Defense (Research and Engineering)
9:00 – 9:20
Break
SESSION V: Invited Talk
Chair: Andrew King – L3Harris
9:20 – 9:40
A Review on CMP Challenges in HWB and Wafer Level packaging
Dr. Bahar Basim– Intel Corporation (Research and Engineering)
9:40 – 10:00
On-Shoring Assembly and Test for Advanced and Legacy Products
Sultan Lilani and Ted Tessier– Integra Technologies
10:00 – 10:20
Developing Secure Custom Silicon – Help Wanted!
Sid Allman – Marvell
10:20 – 10:40
Assured and Trusted Microelectronics Solutions (ATMS): Circuit Boards (PCB) exploring Potential Trustworthy Solutions for Printed and Commercial-Off-The-Shel (COTS) Components
Dr. Fathi Amsaad – Wright State University
10:40 – 11:10
Break
SESSION VI: Paper Presentations
Chair: Dr. Jinhui Wang – University of South Alabama
11:10 – 11:30
PLaNe: Reverse Engineering of Planar Layouts to Gate-Level Netlists
Maximilian Putz – Infineon Technologies AG
11:30 – 11:50
An Assessment of Sample Preparation Challenges in 3D Stacked Integrated Circuit Devices for Post-Silicon Verification and Validation
Noah Padro – Battelle Memorial Institute
11:50 – 13:30
Lunch and Exhibit
Plenary Session IV
Chair: Dr. Mike DiBattista – Varioscale
13:30 – 14:10
Keynote Talk IV: Challenges and Opportunities for 3D Heterogeneously Integrated Microsystems
Dr. Anna Tauke-Pedretti – DARPA
SESSION VII: PANEL DISCUSSION
Moderator: Kelsey Bramschreiber – NSWC Crane
14:10 – 15:40
Counterfeit Part Detection and Mitigation
Speakers: Dan DiMase – Aerocyonics, Inc., Frederick Schipp – Naval Surface Warfare Center, Sultan Lilani – Integra Technologies
15:40 – 16:00
Break
SESSION VIII-A: Workshop II
Location: Mediterenian I
16:00 – 17:20
SESSION VIII-B: Paper Presentations
Chair: Gregory Fritz – Draper
16:00 – 16:20
CMX-Ray: An X-ray Compatibility Metric for Advanced Packages to facilitate Design-for-Inspection
M Shafkat M Khan – UNIVERSITY OF FLORIDA
16:20 – 16:40
PQC Cloudization: Rapid Prototyping of Scalable NTT/INTT Architecture to Accelerate Kyber
Mojtaba Bisheh-Niasar – Microsoft
16:40 – 17:00
PALLET: Protecting Analog Devices using a Last-Level Edit Technique
Md Rafid Muttaki – UNIVERSITY OF FLORIDA
17:00 – 17:20
Non-Destructive Hardware Trojan Circuit Screening by Backside Near Infrared Imaging
Junichi Sakamoto – National Institute of Advanced Industrial Science and Technology
Time
Day 3: October 26, 2023
7:20 – 8:20
Registration and Breakfast
Plenary Session V
Chair: Dr. Health Berry – Radiance Technologies
8:20 – 9:00
Keynote Talk V: Criticality of Access to SOTA Microelectronics in a Global Supply Chain – Weighing Risks
Brett Hamilton– Applied Research Institute
9:00 – 9:20
Break
SESSION IX: Paper Presentations
Chair: Dr. Amin Yousefi – Meta
9:20 – 9:40
MeLPUF: Memory-in-Logic PUF Structures for Low-Overhead IC Authentication
Christopher Vega – University of Florida
9:40 – 10:00
IED_PUF Probe: A PUF-based Hardware Fingerprint Extraction Equipment for IEDs
Dr. TV Prabhakar – Indian Institute of Science, Bangalore
10:00 – 10:20
Exploring Security of Embedded SRAM in PIC and RISC-V Chips: Insights from Image Processing of Low-Cost Photon Emission Microscopy
Bahareh Ebrahimi Sadrabadi – University of Waterloo
10:20 – 10:40
Exploiting Hardware Imperfections for GPS Spoofing Detection using Clock Variations
Mirza Athar Baig – University of Nebraska-Lincoln
10:40 – 11:10
Break
SESSION X: Paper Presentations
Chair: Gill Duykers – Invariant Corporation
11:10 – 11:30
MicroBitstreams: Reducing Configuration Time of Encrypted Bitstreams
Christopher Sozio – Naval Surface Warfare Center Crane
11:30 – 11:50
RI-SAR: Randomized Input SAR ADC Resilient to Power Side Channel Attacks
Sumanth Karanth – The University of Texas at Austin
11:50 – 12:10
A sense of self for power side-channel signatures: Time-series Side-channel Disassembler and Integrity Monitor
Random Gwinn – The Johns Hopkins University Applied Physics Laboratory
12:10 – 12:30
Closing Remarks
General Chair and Program Chair
12:20 – 13:30
Lunch
Speakers
Dr. Marla Dowell
Director, CHIPS R&D Metrology Program and NIST Boulder Laboratory
Dr. Matthew J. Kay
Scientist for Trusted Microelectronics (SSTM) | OUSD(R&E) DCTO(CT) | Trusted & Assured Microelectronics Program Manager
Dr. Alison Smith
Microelectronics Commons Technical Director | OUSD(R&E) DCTO(CT)
Dr. Anna Tauke-Pedretti
Program Manager | Microsystems Technology Office (MTO) | DARPA
Brett Hamilton
SVP of Microelectronics & Advanced Technology Strategy – ARI | Advisor for the America’s Frontier Fund
Chris Peters
U.S. Partnership for Assured Electronics | Washington DC
Dr. Bahar Basim
Senior Staff Process Engineer, CMP Lead | Intel Corporation
Sid Allman
Senior Technical Director | Custom Silicon Solutions | Marvell Technology
Dr. Fathi Amsaad
Assistant Professor | Department of Computer Science | Wright State University
Dr. Franck Courbon
CEO and Founder Ethicronics Ltd | Cambridge, UK
Ted Tessier
Chief Technology Officer | Integra Technologies Inc.
Sultan Lilani
Director | Integra Technologies
Kelsey Bramschreiber
Navy JFAC HwA Operations Deputy | NSWC Crane
Fred Schipp
Electronics Engineer | Naval Surface Warfare Center
Dan DiMase
President & CEO | Aerocyonics, Inc.
Saverio Fazzari
Senior Lead Engineer | Booz Allen Hamilton
Sarah Adams
ssistant Program Manager | Alternative Computing Paradigms | Johns Hopkins University Applied Physics Lab (JHU-APL)
Brandon Hamilton
Program Manager | Microelectronics Packaging | BAE Systems
Dr. Alkim Akyurtlu
Director (UML), Raytheon UML Research Institute (RURI) | Director, Printed Electronics Research Collaborative (PERC) | UMass Lowell
Dr. Nathan Nakamura
NRC Postdoctoral Fellow | National Institute of Standards and Technology
Dr. Erin Gawron-Hyla
Research Chemist | US Army
Fabien Bouffard
Hardware Security Engineer | eShard
Alexander Quadrini
Army
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