Past Program Schedule
*All Times are in CST
Time
Day 1: November 30, 2021
11:45 – 12:00
Opening Remarks – PAINE Awards
General Chair and Program Chair
Plenary Session
12:00 – 12:35
Keynote Talk I: Can Chips be Hardened Against Attacks During Physical Design?
Serge Leef – DARPA
12:35 – 12:45
Live Q&A
SESSION I: Invited Talks I
12:45 – 13:05
Computed Tomography Challenges of Inspection of Navy Electronics.
Kyle Stoll-Navy Crane
13:05 – 13:25
Advanced Digital Forensics Investigations: Toward Systematic Threat Hunting Incident Response
Dr. Amin Termeh Yousefi– Facebook
13:25 – 13:45
Surface and Subsurface Electrical Measurements Using Scanning Microwave Impedance Microscopy
Jeffrey Jarvis – Army DEVCOM AvMC Parts Reliability
13:45 – 14:00
Live Q&A
14:00 – 14:15
Facebook Break (Diamond Sponsor)
SESSION II: Live Panel Discussion I
14:15 – 15:30
Secure Heterogeneous Packaging
Panelists: Dr. Darren Crum (Navy), Peter O Donnell (Army), Dan Toohey (Mercury), John Stephens (Raytheon), Brian Sapp (I3 Microsystems)
Moderator: Saverio Fazzari (Booz Allen Hamilton)
SESSION III: Image Analysis and Artificial Intelligence for Assurance I
15:30 – 15:50
Preparation, Imaging, and Design Extraction of the Front-End-of-Line and Middle-of-Line in a 14 nm Node FinFET Device
Adam R. Waite– Battelle Memorial Institute
15:50 – 16:05
ViTaL: Verifying Trojan-Free Physical Layouts through Hardware Reverse Engineering
Matthias Ludwig – Infineon Technologies AG
16:05 – 16:20
Microelectronics Failure Prediction and Localization from Optical and Thermal Imagery
Md Alimoor Reza – Indiana University
16:20 – 16:35
Live Q&A
SESSION IV: Side Channel Attacks
16:35 – 16:50
Visualizing Electromagnetic Fault Injection With Timing Sensors
Michael Paquette – MITRE
16:50 – 17:05
Wavelet Selection and Employment for Side-Channel Disassembly
Random Gwinn – Johns Hopkins University
17:05 – 17:20
Exposing Data Value On a Risc-V Based SoC
Ezinam Bertrand Talaki – CEA/LETI
17:20 – 17:35
Live Q&A
Time
Day 2: December 1, 2021
12:00 – 12:35
Keynote Talk II: Heteregenoues Packaging
John Oakley – Semiconductor Research Corporation
12:35 – 12:45
Live Q&A
SESSION V: Invited Talks II
12:45 – 13:05
E-beam Probing: A High-Resolution Technique to Read Volatile Logic and Memory Arrays on Advanced Technology Nodes
Jennifer Huening– Intel Corporation
13:05 – 13:25
Backside Integrated Circuit Magnetic Field Imaging with a Quantum Diamond
Microscope – MITRE
13:25 – 13:45
Defect Detection and Classification in PCB Manufacturing using Amazon Web Services
Elizabeth Samara, Prashanth Ganapathy – Amazon WebServices
13:45 – 14:00
Live Q&A
14:00 – 14:15
Allied Break – (Platinum Sponsor)
SESSION VI: Live Panel Discussion II
14:15 – 15:30
Advances in Analog Domain Security and IC Fingerprinting
Panelists: Dr. Norman Chang (Ansys), Doug Gardner (Analog Devices), Dr. Thomas Kent (Battelle)
Moderator:Dr. Richard Ott, AFRL
SESSION VII: Image Analysis and Artificial Intelligence for Assurance II
15:30 – 15:45
Deep Learning-Based Approaches for Text Recognition in PCB Optical Inspection: A Survey
Shajib Ghosh – University of Florida
15:45 – 16:00
ChangeChip: A Reference-Based Unsupervised Change Detection for PCB Defect Detection
Yehonatan Fridman – Israel Atomic Energy Commission
16:00 – 16:15
Automated Trace and Copper Plane Extraction of X-ray Tomography Imaged PCBs
Ulbert Botero – University of Florida
16:15 – 16:30
Live Q&A
SESSION VIII: FPGA Bitstream protection and vulnerabilities
16:30 – 16:45
Two-Photon Optical Beam Induced Current for Circuit Level Verification and Validation of a 130 nm Microelectronic Device
Jeffrey Simon – Battelle Memorial Institute
16:45 – 17:00
Bitstream Reverse Engineering of Microsemi’s VersaTile-based FPGAs
Yongseen Kim – Electronics and Telecommunications Research Institute, South Korea
17:00 – 17:15
Patchable Hardware Security Module (PHaSM) for Extending FPGA Root-of-Trust Capabilities
Christopher Sozio – NAVSEA Crane
17:15 – 17:30
Live Q&A
Time
Day 3: December 2, 2021
12:00 – 12:35
Keynote Talk III: SI Traceability for 5G Hardware Authentication
Dr. Paul Hale – National Institute of Standards and Technology
12:35 – 12:45
Live Q&A
SESSION IX: Invited Talk Session III
12:45 – 13:05
The 7 Habits of Highly Effective Security-Aware Design Automation
Jason Fung – Intel Corporation
13:05 – 13:25
Automation for Hardware and Supply Chain Assurance
Beau Bakken – Caspia Technologies
13:25 – 13:45
Recent Advances in Circuit-level Techniques to Kill the EM Side Channel Leakage at Its Source
Dr. Shreyas Sen – Purdue University
13:45 – 14:00
Live Q&A
14:00 – 14:20
Gold Sponsors Break
SESSION X: Countermeasures Against Tampering and Decomposition
14:20 – 14:35
Attacks and Countermeasures for Capacitive PUF-Based Security Enclosures
Kathrin Garb – Fraunhofer Institute AISEC
14:35 – 14:50
Aging Prediction of Integrated Circuits Using Ring Oscillators and Machine Learning
Korey Arvin –University of Cincinnati
14:50 – 15:05
Fuzzy Key Generator Design using ReRAM-Based Physically Unclonable Functions
Ashwija Reddy Korenda –Northern Arizona University
15:05 – 15:20
Live Q&A
SESSION XI: Trojans and Backdoors: Detection and Prevention
15:20 – 15:35
CRESS: Framework for Vulnerability Assessment of Attack Scenarios in Hardware
Matthias Ludwig – Infineon Technologies AG
15:35 – 15:50
Surreptitiously Adding a Microcontroller to a Printed Circuit Board
Dr. Sam Russ – University of South Alabama
15:50 – 16:05
Detection of Anomalous Integrated Circuits Using a Cavity Resonator System With Machine Learning
Aditya Nechiyil – The Ohio State University
16:05 – 16:20
Live Q&A
SESSION XII: Special Session: Red Team Activities
16:20 – 16:35
Risk Mitigation in the Design of Complex Systems through PIV & V
Warren Savage – University of Maryland
16:35 – 16:50
Emulating Adversaries and Measuring Outcomes for Logic Locking
Dr. Ramesh Karri, Dr. Benjamin Tan – New York University
16:50 – 17:05
Red Teaming Whys and Hows: A Logic Obfuscation Perspective
Dr. Ankur Srivastava, Dr. Yuntao Liu – University of Maryland
17:05 – 17:20
Live Q&A
17:20 – 17:35
Closing Remarks
General Chair and Program Chair
Speakers

Serge Leef
Program Manager | DARPA

John Oakley
Science Director | Semiconductor Research Corporation

Dr. Paul Hale
RF Technology Division Chief | National Institute of Standards and Technology

Kyle Stoll
Chief Technologist for Non-Destructive Testing | Naval Surface Warfare Center, Crane Division

Dr. Edlyn V. Levine
Chief Technologist, Acceleration Office | The MITRE Corporation

Dr. Amin Termeh Yousefi
Forensic Lab Manager, Anti Fraud & Piracy | Facebook | Global Security Intelligence and Investigations

Jason Fung
Director, Offensive Security Research & Academic Research Engagement | Intel Corporation

Nicholas Antoniou
VP of Product Management and Business Development | PrimeNano

Dr. Darren Crum
Advanced Packaging Lead & Heterogeneous Integrated Packaging Prototype Program Technical Manager | US Department of Navy

Brian Sapp
Vice President and General Manager | I3 Microsystems

Peter O’Donnell
T&AM Technical Execution Lead | Army CCDC, Protective Technologies Division Chief

John Stephens
Manager – Secure Mission Processing | Raytheon Intelligence and Space

Daniel Toohey
Technical Director | Mercury Systems

Dr. Norman Chang
Ansys Fellow & Chief Technologist at Electronics and Semiconductor BU | ANSYS, Inc.

Doug Gardner
Chief Technologist for Trusted Security Solutions | Analog Devices

Dr. Thomas Kent
Division Manager – Cyber Trust and Assurance | Battelle Memorial Institute

Dr. Shreyas Sen
Associate Professor | Purdue University

Jennifer Huening
Senior FA Engineer | Intel Corporation

Elizabeth Samara Rubio
Principle Specialist | Amazon Web Services

Prashanth Ganapathy
Senior Solutions Architect | Amazon Web Services

Warren Savage
Visiting Researcher and PI of DARPA AISS IV&V | University of Maryland

Dr. Ramesh Karri
Professor | New York University

Dr. Benjamin Tan
Research Assistant Professor | New York University

Dr. Yuntao Liu
Postdoctoral Researcher | University of Maryland
