7:30 – 9:00

Registration & Breakfast

9:00 – 9:30

Opening Remarks – PAINE 2024 Awards

General Chair and Program Chair

9:30 – 10:00

Keynote Talk I: Bridging Virtual and Physical: Accelerating U.S. Semiconductor Innovation with Digital Twin Technologies

Christopher Ritter – SMART USA Institute

10:00 – 10:30

Break

10:30 – 10:50

FSE Assurance and 3-D Advanced HI Packaging Failure Analysis Lab

Matt Walsh – Florida Semiconductor ENGINE

10:50 – 11:10

The Evolution of Electronics Packaging to Chiplet Architecture

Dr. Charles Woychik – Nhanced Semiconductors, Inc.

11:10 – 11:30

Metrology Challenges & Solutions for Hybrid Bonding

Dr. Bongsub Lee – ADEIA

11:30 – 11:50

Enhancing Supply Chain Trust and Assurance with Artificial Intelligence

Dr. Matthew Areno – Midwest Microelectronics Consortium

11:50 – 1:00

Lunch

1:00 – 1:30

Keynote Talk II: National Advanced Packaging Manufacturing Program

Dr. Rob Aitkens – CHIPS R&D Office

1:30 – 1:50

Visionary 1: Navigating the Post-Generative AI Era of Failure Analysis

Dr. Joy Liao – Nvidia

1:50 – 3:00

Virtual Metrology

Dr. Anis Rahman – Applied Research & Photonics, Inc.

Samuel Wood – EMD Electronics

Steve Choe – Gauss Labs

Nikhith Vankireddy – Multiscale Technologies

3:00 – 3:30

Break

3:50 – 4:10

Lurking in the Shadows: Challenges for X-Ray Inspection to Uncover Electromigration-Based Hardware Trojans in Advanced Packaging

Katayoon Yahyaei – University of Florida

4:10 – 4:30

X-Ray Fault Injection Localization with a Shield on Powered and Unpowered Devices

Paul Grandamme – Université Jean Monnet-France

4:30 – 4:50

Metaheuristic Color Scheme Strategies for Enhanced Visual Inspection of 3D IC Layouts

Jie Zhang – National University of Singapore

4:50 – 5:10

Magnetic Field Imaging using Diamond Nitrogen-Vacancy Centers for Fault Detection and Security of Semiconductor and Superconductor Electronics

Pauli Kehayias – MIT Lincoln Laboratory

5:10 – 6:10

Exhibit and Poster Session

6:10 – 7:30

Social Event

7:00 – 8:30

Breakfast

8:30 – 9:00

Keynote Talk III: Microelectronics Commons

Dr. Tim Morgan – Microelectronics Commons

9:00 – 9:30

Keynote Talk IV: Next-Generation Microelectronics Manufacturing

Saverio Fazzari – Booz Allen Hamilton

9:30 – 9:50

Break

9:50 – 10:50

Title: Insights into NIST Hardware Security Research Activities

Abstract: This session will provide insight into the hardware security research activities within NIST’s Information Technology Laboratory (ITL) and Communications Technology Laboratory (CTL). An overview of ITL’s hardware security activities will be presented including motivation, areas of research, and upcoming events; followed by a closer look at current research activities related to Side Channel Analysis (SCA).

Dr. Nelson Hastings, Dr. Jim Booth, Dr. Guru Venkataramani

10:50 – 11:10

Break

11:10 – 11:30

METIS Dissemination Portal for CHIPS Metrology Digital Data Products

Dr. June Lau – NIST

11:30 – 11:50

Adventures in Hyperspectral Computed Tomography for Non-destructive Hardware Evaluation

Dr. Eric Goodman – Sandia National Laboratories

11:50 – 12:10

Electron Beam Assisted Back-Contact Free Electrical Atomic Force Microscopy

Dr. Umberto Celano – Arizona State University

12:10 – 12:30

Defect Imaging of Emerging Memory Materials via Electro-Optical Characterization

Dr. Thomas Beechem – Purdue University

12:30 – 2:00

Lunch

2:00 – 2:20

Visionary 2: Keeping up with Moore’s Law: Silicon Reliability and Product Qualification challenges due to Technology Scaling

Amit Marathe – Google

2:20 – 3:30

The Role of AI in Redefining Physical Assurance

Dr. Adam Kimura – Battelle

Dr. Sarah Paluskiewicz – Northrop Grumman

Dr. Navid Asadi – University of Florida

Dr. Julian Warchall – IBM Research

Dr. Edward Jimenez – Sandia National Laboratories

3:30 – 4:00

Break

4:00 – 4:20

Advancing Microelectronics Evidence-Based Assurance while Preserving Confidentiality: Copia

Nikhil Shenoy – Rapid Innovation and Security Experts, Inc.

4:20 – 4:40

Analysis of Temperature Effect on SRAM PUF For Low Cost Applications

Sayan Samanta – The University of Alabama in Huntsville

4:40 – 5:00

A Quantitative Means for Assessing Failure in SnBi-Based Solder Joints During Current Stressing

Sitaram Panta – SUNY Binghamton

5:00 – 5:20

Post-Silicon Functional Verification and Validation: Chip to RTL Analysis

Tim McDonley – Battelle Memorial Institute

5:20 – 5:40

Evaluating multimodal foundation models for few-shot PCB identification and reasoning

Zachary Burns – Leidos Innovations Center

7:00 – 8:00

Breakfast

8:20 – 8:50

Keynote Talk V: Secure Design-for-Test and Inspection Techniques for Trusted 3DIC

Antonio De la Serna – Siemens EDA

8:50 – 9:10

Hardware-Enabled Mechanisms for Verifying Responsible AI Development

Will Hodgkins – Center for AI Safety

9:10 – 9:30

Mathematical Approaches to Microelectronics Assurance

Dr. Whitney Batchelor – Graf Research

9:30 – 9:50

Deep-Learning Side-Channel Analysis

Dr. Boyang Wang – University of Cincinnati

9:50 – 10:10

Chiplets and Reliability

Dr. Jason Rupe – Cablelabs

10:10 – 10:30

Break

10:30 – 10:50

Exploiting Electron-Beam Probing for Information Leakage in Advanced-Node Integrated Circuits

M Shafkat M Khan – Thermo Fisher Scientific Inc.

10:50 – 11:10

Converged Standardization: Improving Template Attack Success Using Aggregated Power Trace Self-Referencing

Dave Ingalls – Indiana University

11:10 – 11:30

Efficient Side-channel Leakage Assessment Using Deep Learning-based Feature Extractor and ANOVA

Yuta Fukuda – National Institute of Advanced Industrial Science and Technology – Japan

11:30 – 11:50

Enabling Algorithm Detection in the Presence of Interrupts: Using HAL for Side-Channel Interrupt Detection and Mitigation

Kevin Pintong – Binghamton University

11:50 – 12:50

Lunch

12:50 – 1:10

Analyzing Sources of Fingerprints in Wireless Modules Using Microwave Measurements

Vishnuvardhan Iyer – National Institute of Standards and Technology

1:10 – 1:30

Multi-Granular Information Flow Tracking in RISC-V based SoCs

Dhruvakumar Aklekar – University of North Carolina at Charlotte

1:30 – 1:50

AuthenTree: A Scalable MPC-Based Distributed Trust Architecture for Chiplet-based Heterogeneous Systems

Ishraq Tashdid – University of Central Florida

1:50 – 2:10

FirmEM: Firmware Flashing Detection via Unintentional Electromagnetic Emissions

Elvan Ugurlu – Aether Argus Inc.

2:10 – 2:30

Break

2:30 – 2:50

A Defense Electronics Supply Chain Root Cause Analysis-based Model to identify data features that are viable for counterfeit predictive analytics

Konstantinos Belesis – George Washington University

2:50 – 3:10

Time and Sentiment Correlation Analysis to Determine Open-Source Supply Chain Attacks

Anthony Melaragno – United States Naval Academy

3:10 – 3:30

Integrated-Circuit Supply Chain Verification Using Mask Set Comparison in the Open Source Context

Olivier Thomas – Texplained – France

3:30 – 3:50

Power Spectrum Analysis-Based Counterfeit Screening: A Hardware Comparison

Devon Richman – University of Maryland

3:50 – 4:00

Closing

General Chair and Program Chair